In many applications utilizing a power amplifier, it is desirable to control the amplifier's output power, so that the output power may be controlled independently of the input signal. For instance, in GSM cellular phones, the power amplifier may be required to have its output power ramped from a low level to the desired transmit power in a controlled manner at the beginning of a transmission burst. Furthermore, in such GSM systems, the amplifier may be required to have its output power ramped down to a low level at the end of the transmission burst. Other systems and other cellular phone standards can have similar power control requirements, such as adjusting the transmit level and/or ramping up and down the power level in a controlled manner according to time-slotting requirements.
FIG. 1 is a diagram of a representative plot of the output power of a prior art power amplifier in a time-division multiple-access communications system, such as in GSM cellular telephony. The output power of the power amplifier, indicated by the representative curve 101, may be controlled from a low level before transmitting data, held at a higher level while transmitting data, and then brought down to a low level after the data is sent. Many systems have requirements that the power must be held between certain levels, indicated by the upper limit 102 and the lower limit 103, so that the power is held between these limits at all times during the transmission. It is also common that the output frequency spectrum has limits placed on it so that the particular shape of the ramp up and ramp down or power must be accurately controlled. If the shape deviates from the desired shape, particularly if sharp transitions occur, the output frequency spectrum may fail. It is also often desirable to have accurate control over the amount of output power during the time of data transmission 104. Each of these requirements may have to be met by the power control system.
There are a number of approaches to regulating the output power of an amplifier. Typically, such as when accuracy is required, some form of closed loop system can be used. In these systems, some operating parameter of the power amplifier which is related to the output power is measured and a feedback loop adjusts the power level until the detected parameter indicates that the output power is as desired. Some typical detected parameters include the amplifier supply voltage, the amplifier supply current, the output power as reported by a directional coupler in series with the output, and the output voltage envelope. Different detection parameters can have different advantages and disadvantages relative to each other. For instance, supply current sense and directional coupler power methods typically require inserting components in series with either the supply current or the output signal resulting in reduced power added efficiency, whereas supply voltage sense and output voltage sense do not typically have this disadvantage. Another example is that supply voltage sense and supply current sense can be relatively inaccurate as they are detecting a parameter that is indirectly related to the output signal level, whereas the directional coupler power and output voltage sense methods sense the output signal directly. Also, the supply voltage sense and output voltage sense methods can have high output power variation under load mismatch, whereas the directional coupler power and supply current sense methods can be less sensitive to load mismatch.
FIG. 2 is a diagram of a prior art power amplifier and power control system using output voltage detection. Power amplifier 212 receives rf input 213 which it amplifies to produce rf output 214. The amplitude of the rf output 214 can be adjusted by the control signal 219. Amplitude detector 215 generates a feedback signal 216 related to the sensed amplitude of the output rf signal 214. Error amplifier 217, which may be an integrating amplifier or other differencing amplifier, compares the feedback signal 216 to a power control input signal 218 so as to adjust control signal 219 in a way which tends to reduce the difference between the feedback and input signals. In this way, power control input signal 219 can control the output power of the power amplifier. As discussed previously, other types of detectors can be used instead of amplitude detector 215 to generate feedback signal 216, such as a detector sensing the dc current, the dc voltage, or a detector sensing the power from a directional coupler.
An issue that can arise in systems using power amplifier power control is that it is often desired to keep the amplifier output power in regulation at all times. For instance, in the GSM cellular standard, the transmission burst must meet a time mask requirement and a spectral frequency mask requirement, each of which can be difficult if the output power does not closely track the desired output power. If the power amplifier is incapable of making the output power requested, the output power can be less than the requested power for the duration of time wherein the power requested is higher than can be made. This clipping of the output power can be disadvantageous in multiple ways.
FIG. 3 is a diagram of a representative prior art power versus time plot in a situation where this clipping occurs. In this case, the output power 305 requested of the power amplifier is higher than the maximum power that the amplifier can produce, as indicated by the line 306. At the times when the amplifier is requested to make more power than this maximum power, the amplifier will typically instead produce its maximum power as indicated by waveform 307. This can cause a failure to pass the upper limit 102 of the time mask, as the power waveform in the region around area 308 can be above the mask. Additionally, sharp corner in the power versus time plot such as area 309 can cause failure to comply with the output frequency spectrum.
In addition to causing the output power to clip, requesting more power than the PA can produce can also cause a behavior known as wind-up. This can occur when the feedback loop contains an integrator or other high gain device with limited bandwidth so that the error signal in the feedback loop causes the control loop to keep increasing even after the power amplifier ceases to make more output power with increasing control signal. This can result in the control signal being much higher than the responsive range of the power amplifier when the desired output power is then reduced. This can cause a delay between the requested reduction and the actual reduction in output power since the control loop must first reduce the control voltage to the useful range before the power can begin to reduce.
FIG. 4 is a representative prior art power versus time plot in a situation where this wind-up occurs. In this case, the output power 305 requested of the power amplifier is higher than the maximum power that the amplifier can produce, as indicated by the line 306. At the times when the amplifier is requested to make more power than this maximum power, the amplifier will typically instead produce its maximum power as indicated by waveform 307. Because the output power is lower than the requested power, the integrated error signal in the control loop can grow large by the time that the ramp down begins. After the ramp down, there can be a delay 410 between the requested power reducing and the actual power reducing as this integrated error signal is removed from the control node. After this delay, the output power can rapidly converge to the requested power as seen in the waveform in region 411. This can cause a failure to pass the upper limit 102 of the time mask, as the power waveform in region 411 can be above the mask. Additionally, a sharp transition such as area 309 and high slope in region 411 can cause failure to comply with the output frequency spectrum.
Another aspect of power control loops is the protection of the amplifier from over-voltage and over-current conditions. If the load presented to the amplifier is different from the intended load, typically 50 Ohms, then the amplifier may be subjected to higher voltage or current stresses. These effects can result in over-voltage conditions that can be greater than the rated voltage, or over-current conditions that can be greater than the rated current. These conditions can reduce the operating lifetime of the amplifier or even cause immediate destruction if not avoided. Prior art power control systems that take measures to avoid these over-voltage and over-current conditions can be used to avoid this reliability issue, but these prior art power control systems add complexity and cost to the amplifier.
In many applications, such as in cellular phones and other portable devices, it is desirable to limit the current drain from the battery so that the device can be used for a longer time before re-charging the battery. As a result, the higher current that can be caused by load mismatch is disadvantageous even if the amplifier reliability is not a concern. Nevertheless, prior art systems are not effective at effectively eliminating power drain resulting from load mismatch.